1. Field of the Invention
The present invention relates to the field of computers. More specifically, the present invention relates to computer architecture.
2. Description of the Related Art
The increasing disparity between processor speeds and memory access speeds exacerbates the already heavy demand on memory bandwidth. In addition, the focus on throughput computing sensitive multi-core processor designs further increases the demand on memory bandwidth.
Write operations consume a significant portion of memory bandwidth. When a write operation is performed, the value of the write operation is written to cache as well as system memory. The moment when the value is written to system memory is dependent upon the write policy implemented, such as writeback versus write-through. Some write operations do not effectively change the corresponding location in system memory or cache. In other words, the write operation is writing the same value that already resides at the destination of the write operation. Although performance of such a write operation does not change the contents of the destination location, memory bandwidth is spent on the write operation, as well as other resources, such as resources expended unnecessarily firing write pins. Accordingly, a technique is desired to identify ineffective write operations and prevent their consumption of resources.